G. V. Sumukha Bharadwaj

Postdoctoral Fellow · Theoretical Computer Science Group
The Institute of Mathematical Sciences, Chennai

About

I am a Postdoctoral Fellow in the Theoretical Computer Science Group at the Institute of Mathematical Sciences (IMSc), Chennai. I completed my Ph.D. in Computer Science and Engineering at IIT Tirupati, working with Dr. S. Raja.

My doctoral research investigated conditional lower bounds, polynomial identity testing, and coefficient extraction problems in arithmetic circuit complexity.

I am interested in algorithms and computational complexity, with broad interests in theoretical computer science.

Publications and preprints

Randomized Black-Box PIT for Small Depth +-Regular Non-commutative Circuits

G. V. Sumukha Bharadwaj and S. Raja

FSTTCS 2025 · ECCC TR24-198

Link

A Simple Inclusion-Exclusion Based Algorithm for (k,n)-MLC and Related Problems

G. V. Sumukha Bharadwaj and S. Raja

ACM Transactions on Computation Theory, 18(1), 2026

Link

On the Hardness of the Determinant: Sum of Regular Set-Multilinear Circuits

S. Raja and G. V. Sumukha Bharadwaj

FCT 2021

Link

Hardness of Rainbow Connectivity for Split Graphs and Counting Rainbow Paths

G. V. Sumukha Bharadwaj

Preprint · SSRN, 2024

Academic background

2026 – present

Postdoctoral Fellow
Theoretical Computer Science Group, IMSc Chennai

Ph.D.

Computer Science and Engineering
Indian Institute of Technology Tirupati
Advisor: Dr. S. Raja
Thesis: Conditional Lower Bounds, Identity Testing, and Coefficient Extraction Problems in Arithmetic Circuit Complexity

Contact

Theoretical Computer Science Group
The Institute of Mathematical Sciences
Chennai, India

Email: sumukhgurunath@gmail.com